TPU RTL Design Engineer

Location: Mountain View
Posted on: June 23, 2025

Job Description:

Minimum qualifications: Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power design techniques. Preferred qualifications: Masters degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science. 8 years of experience working on digital design while collaborating with architects. Knowledge of accelerators (e.g., Machine Learning or GPUs) or similar high performance designs. About the job Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Googles direct-to-consumer products. Youll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Googles mission is to organize the worlds information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make peoples lives better through technology. The US base salary range for this full-time position is $156,000-$229,000 bonus equity benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google . Responsibilities Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications. Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems. Engage with Verification and Silicon Validation teams to ensure functionality of the design. Provide input on synthesis, timing closure, and Physical Design of digital blocks. Take a leadership role on technical project teams and set technical direction.

Keywords: , San Bruno , TPU RTL Design Engineer, Engineering , Mountain View, California